Spin-on-glass (SOG) is frequently used for gap fill and planarization of inter-level dielectrics (ILD) in multi-level metalization structures. It is a desirable material for low-cost fabrication of IC circuits. Commonly used SOG materials may be of two basic types, i.e., an inorganic type silicate based SOG and an organic type siloxane based SOG. One of the typical organic type SOG materials is a silicon oxide based polysiloxane which is featured with radical groups replacing or attaching to oxygen atoms. Based on the two basic structures, the molecular weight, the viscosity and other desirable film properties of SOG can be modified and adjusted to suit the requirement of a specific IC fabrication process.
SOG film is typically applied to a pre-deposited oxide surface as a liquid to fill gaps and steps on the substrate. Similar to the application method for photoresist films, a SOG material can be dispensed onto a wafer and spun at a rotational speed which determines the thickness of the layer. After the film is evenly applied to the surface of the substrate, it is cured at a temperature of approximately 400.degree. C. and then etched back to achieve a smooth surface in preparation for a capping oxide layer onto which a second inter-level metal may be patterned. The purpose of the etch-back step is to leave SOG between metal lines but not on top of the metal, while the capping oxide layer is used to seal and protect SOG during further fabrication processes. The siloxane based SOG material is capable of filling 0.15 micron gaps and therefore it can be used in 0.25 micron technology.
When fully cured, silicate SOG has similar properties like those of silicon dioxide. Silicate SOG does not absorb water in significant quantity and is thermally stable. However, one disadvantage of silicate SOG is the large volume shrinkage during curing. As a result, the silicate SOG retains high stress and cracks easily during curing and further handling. The cracking of the SOG layer can cause a serious contamination problem for the fabrication process. The problem can sometimes be avoided by the application of only a thin layer, i.e., 1000.about.2000 .ANG. of the silicate SOG material.
A typical process which utilizes SOG material as an inter-metal dielectric (IMD) insulation is shown in FIG. 1A. A semiconductor structure 10 which has metal conductors 12 formed on a pre-processed semi-conducting substrate and an oxide layer 16 deposited on top is shown. The oxide layer may be suitably deposited of a boro-phospho-tetraethoxy-silicate (BPTEOS) material which is used to insulate previously deposited metal layers. The metal conductors 12 are formed by first depositing a metal layer on a diffusion barrier layer (not shown) such as TiN before the deposition of an AlCu material. On top of the metal conductor material, an adhesion promoter layer such as Ti or TiN is then deposited before an oxide cap layer 20 is used to insulate the metal conductors 12. The oxide cap layer 20 may be deposited of a plasma enhanced oxide (PEOX). On top of the semiconductor structure 10, a first SOG layer 22 is then deposited to seal the metal conductors 12 therein. Since SOG material has a large volume shrinkage ratio when it is deposited in a liquid form, the deposition step of SOG frequently results in void formations 18 and dips 24 in its top surface 14. The void formation may also be a serious problem when multi-layered metal structures in which uniform etching profiles are difficult to maintain are used. Voids in an inter-metal dielectric layer not only pose a reliability concern, i.e., for trapping chemicals or contaminents in the void, but also cause breaks in metal lines if a void is etch opened during a subsequent planarization process. This is shown in FIG. 1B. The open void 26 forms a crack in the SOG layer 22 and may cause a break in the metal lines 12. The void formation defects are especially serious when SOG layers are deposited into metal spacings of less than 0.5 .mu.m.
The task of depositing IMD without void formations has been attempted by others in processes that are not 100% conformal. A complicated multi-step process using ion bombardment to round off comers in order to enhance the IMD filling capability has been developed. For instance, when a single deposition process for SOG results in void formation, as shown in FIG. 2A wherein void 32 is formed in the IC structure 30, the voids 32 can be minimized or eliminated by depositing the SOG film in several steps and sputter-etching between the steps. The multi-step process, also known as a "dep-etch-dep" process, alternately deposits and etches the IMD to create a desired profile. As shown in FIG. 2B, sputter-etching facets the SOG over vertical metal lines 34 and thus improving the gap-fill in a subsequent deposition step shown in FIG. 2C in which a second SOG layer 38 is deposited. The "dep-etch-dep" process, even though results in a substantially void-free SOG layer, requires complicated processing steps which increases the fabrication costs.
Referring now to FIG. 3, wherein a conventional set up for a spin coating apparatus 40 in a factory environment is shown. An air processor, or an air conditioner 68 is normally positioned on a lower floor away from the spin coating apparatus 40 to avoid vibration and contamination by the lubricants used in the air conditioner. An air conditioned flow of air 76 is transported to the spin coater 40 through air flow conduit 72. A damper control valve 80 is normally utilized to control the air flow 76. An enlarged, cross-sectional view of the spin coater 40 is shown in FIG. 4. Spin coater 40 is typically used for spin coating a SOG material on a wafer surface. As shown, in the apparatus 40, a cover 42, two side wall panels 44, 46 and a bottom panel 48 forms a sealed chamber containing a cavity 50 therein. The cover 42 also functions as an air duct for connecting to the flow inlet 52. The flow inlet is normally connected to the air duct through a damper control valve 80. An air flow 56 enters inlet 52, through the damper control valve 80 and other internal passageways (not shown) to enter the chamber cavity 50 as air flow 58. The air flow 56 which is fed into the air duct 42 can be advantageously taken from an air conditioning unit such that the relative humidity and the temperature of the incoming air 56 may be controlled. In the chamber cavity 50, wafer pedestal 62 is mounted on a rotatable shaft 64 and is rotated by DC motor 66. After a wafer 70 is positioned on the wafer pedestal 62 and securely mounted by vacuum means (not shown), a liquid dispensing nozzle is lowered to nearly touching the top surface of the wafer 70 at the wafer center. The distance between the nozzle head and the top surface of wafer 70 is between about 0.5 cm and about 3 cm. After wafer 70 is spun at a rotational speed of at least 100 RPM, or preferably at least 500 RPM, a SOG liquid is injected by a dispensing nozzle onto the center of the wafer. The material is spun out to cover the entire surface of the wafer 70. A drain collecting device 74, or a drain cup is used to collect excess liquid coating spun off the wafer surface 70. Excess liquid coating is then carried away by drain pipe 78. An outlet 82 is used to exhaust the air flow 58 such that the relative humidity in the chamber cavity 50 can be maintained.
In the conventional spin coating apparatus set-up, the air flow rate from an air processor, or an air conditioner is frequently too high to achieve an adequate control of a spin coating process. The only provision in the conventional set-up for correcting the air flow problem is to use a built-in damper control for reducing the air flow volume. For instance, when the air flow rate through the air processor is about 2 m.sup.3 /min, an air velocity in the drain cup of the spin coating device is about 0.28 m/s. When a damper control is used to reduce the air flow rate from the air processor, the variation in the air flow rate or the air velocity in the drain cup causes a large fluctuation in both the humidity and the temperature of the flow. It has been noticed that, when the damper control is used to control the flow rate, the humidity changes non-linearly with the air pressure. This results in a serious process control issue in that in an attempt to decrease the air flow rate, the humidity control is lost which causes variations in the properties of the coating layer obtained. It was further noted that in a conventional spin coating apparatus, the air velocity in the drain cup cannot be stabilized to carry out a reliable and repeatable process.
It is therefore an object of the present invention to provide a method for forming a spin-on-coating on an electronic substrate that does not have the drawbacks or shortcomings of the conventional methods.
It is another object of the present invention to provide a method for forming a spin-on-coating on an electronic substrate substantially without voids which does not require complicated process modifications.
It is a further object of the present invention to provide a method for forming a spin-on-coating on an electronic substrate substantially without void formation which does not require a multi-step deposition-etching-deposition process.
It is another further object of the present invention to provide a method for forming a spin-on-glass layer on a wafer that is substantially without void formation defects by incorporating a simple process modification.
It is still another object of the present invention to provide a method for forming a spin-on-glass layer on a wafer without the void formation defects by controlling the humidity content in the spin-coating chamber.
It is yet another object of the present invention to provide a method for forming a spin-on-glass layer on a wafer without the void formation defects by providing a substantially constant air flow in the spin-coating chamber.
It is still another further object of the present invention to provide an apparatus for spin-on-coating an electronic substrate substantially without void formation defects which is equipped with an air source for flowing into a spin-coating chamber an air flow of controlled humidity and flow rate.
It is yet another further object of the present invention to provide an apparatus for spin-on-coating an electronic substrate substantially without void formation defects which is equipped with an air velocity control system for flowing into the spin coating chamber an air flow of controlled humidity and reduced air velocity.